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Computer architecture

Module name (EN):
Name of module in study programme. It should be precise and clear.
Computer architecture
Degree programme:
Study Programme with validity of corresponding study regulations containing this module.
Computer Science and Communication Systems, Bachelor, ASPO 01.10.2014
Module code: KI440
SAP-Submodule-No.:
The exam administration creates a SAP-Submodule-No for every exam type in every module. The SAP-Submodule-No is equal for the same module in different study programs.
P222-0036
Hours per semester week / Teaching method:
The count of hours per week is a combination of lecture (V for German Vorlesung), exercise (U for Übung), practice (P) oder project (PA). For example a course of the form 2V+2U has 2 hours of lecture and 2 hours of exercise per week.
2V (2 hours per week)
ECTS credits:
European Credit Transfer System. Points for successful completion of a course. Each ECTS point represents a workload of 30 hours.
2
Semester: 4
Mandatory course: yes
Language of instruction:
German
Assessment:
Ninety-minute written exam

[updated 20.03.2007]
Applicability / Curricular relevance:
All study programs (with year of the version of study regulations) containing the course.

KI440 (P222-0036) Computer Science and Communication Systems, Bachelor, ASPO 01.10.2014 , semester 4, mandatory course
Workload:
Workload of student for successfully completing the course. Each ECTS credit represents 30 working hours. These are the combined effort of face-to-face time, post-processing the subject of the lecture, exercises and preparation for the exam.

The total workload is distributed on the semester (01.04.-30.09. during the summer term, 01.10.-31.03. during the winter term).
30 class hours (= 22.5 clock hours) over a 15-week period.
The total student study time is 60 hours (equivalent to 2 ECTS credits).
There are therefore 37.5 hours available for class preparation and follow-up work and exam preparation.
Recommended prerequisites (modules):
KI370 Digital Technology


[updated 01.04.2003]
Recommended as prerequisite for:
KI642 Database Management


[updated 05.12.2011]
Module coordinator:
Prof. Dr.-Ing. Jürgen Schäfer
Lecturer:
Prof. Dr.-Ing. Jürgen Schäfer


[updated 01.04.2003]
Learning outcomes:
Students will learn about the structure, organization and operational principles of a digital computer. The architectural elements of a computer will be discussed at the register level and then combined to create a illustrative computer architecture. The processes during command execution and the addressing techniques used will also be explained. Performance enhancement methods, such as pipelining and the use of cache memory, will also be addressed.

[updated 13.03.2007]
Module content:
 1. Number representation in computers
 2. Memory components
 3. Demonstration computer “DemoCom”
 4. Von Neumann architecture
 5. Microprogramming
 6. Instruction-set architecture
 7. Interrupt handling
 8. RISC processors
 9. Pipelining
10. Cache


[updated 13.03.2007]
Recommended or required reading:
W. Schiffmann, R. Schmitz: Technische Informatik 2, Springer-Verlag, Berlin, 1999
K. Wüst, Mikroprozessortechnik, Vieweg-Verlag, Braunschweig, 2003
H. Malz, Rechnerarchitektur, Vieweg-Verlag, Braunschweig, 2004
J. L. Hennessy, D. A. Patterson: Rechnerarchitektur Analyse, Entwurf, Implementierung und Bewertung, Vieweg-Verlag, Braunschweig, 2004
P. Herrmann : Rechnerarchitektur – Aufbau Organisation und Implementierung, Vieweg-Verlag, Braunschweig, 2000


[updated 13.03.2007]
Module offered in:
SS 2018, SS 2017, SS 2016, SS 2015, SS 2014, ...
[Mon Jun 24 08:47:16 CEST 2024, CKEY=ra, BKEY=ki, CID=KI440, LANGUAGE=en, DATE=24.06.2024]